#memory-models
Wiki 3
- Data race Unordered concurrent access to one memory location with at least one write; distinct from a general race, and what lockset and vector-clock detectors hunt
- Shared memory consistency from scratch, part 1: causality Alloth designs a deliberately permissive multiprocessor to derive memory-model rules, and argues the C++11/20 atomics model gets causality wrong
- Write atomicity (multi-copy atomicity) Whether a write is invisible to every processor until all cached copies are invalidated; MCA vs oMCA vs nMCA, and which CPUs guarantee it